Significant progresses have been made on the performance of semiconductor microchips since the small-scale integration in the early 1960s. One of the common indicators of performance is chip speed. Smaller critical dimension (CD) of the semiconductor devices allows more semiconductor devices within a same chip, which leads to a shortened signal transmission distance in circuits and an improved chip speed. Furthermore, smaller-sized semiconductor devices result in smaller microchip packages, and smaller-sized electronic products are more convenient for everyday carrying and use. Therefore, it is an important developing trend in semiconductor fabrication to manufacture semiconductor devices with smaller sizes.
However, the increasingly smaller size of semiconductor devices has brought along some unfavorable factors. For example, firstly, continuous decrease in the gate oxide thickness of MOSFETs may cause problems such as decreased breakdown voltage of the gate oxide. Secondly, continuous decrease in channel length may cause the effect of drain-induced barrier lowering, which largely reduces the controllability of the gate and increases the leakage current. Finally, as the size of the MOSFET decreases, the threshold voltage also decreases, which calls for more accurate control of the carrier concentration in the channel.
The disclosed methods and systems are directed to solve one or more problems set forth above and other problems.